datatrak:mk2hardware

Locator Mk.II hardware

Overview

TBD.

Emulator

I've written an emulator for the Mk2 Locator. It can be downloaded from: https://github.com/philpem/datatrak-emulator

Hardware addresses

Start End Device
000000 ?????? EPROM.
Two physical ROMs on the cartridge, each 1Mbit = 128 KiB, giving 256 KiB total.
ROM cartridge board can take 2 Mbit EPROMs, giving 512 KiB ROM. This is the maximum allowed by the available address lines on the ROM cartridge connector.
200000 ?????? RAM.
Either four Toshiba TC55257 (32 KiB x 4 = 128 KiB), or two Toshiba TC551001 (128 KiB x 2 = 256 KiB).
In the 2-RAM 256K configuration, all RAM is battery backed. In the 4-RAM 128K configuration, only the lowest 64K is battery backed.
240000 240001 A/D Converter
240001 Write: Start conversion.
Read: Get conversion result.
240100 240101 Digital Input Port
240101 
 7654 3210 
 .... .Dq.

D: Data from EEPROM (MISO)
q: Unknown (accessed by FUN_2280). Possibly related to the alarm.

240200 240201 RF Phase Measurement, aka PHSCNT
240200 Contains the last phase measurement, ranging from 0 to 999 (measures milli-cycles).
To read:
Read the low byte first (240001) in a byte transaction. Then read the upper byte (240000) as a 16bit word read.
Result = lobyte + ((hibyte & 0x0F) << 8)
240201
240300 2403xx SCC68692 Dual UART – refer to datasheet
240400 240401 68K-to-8031 interface (Ub1 and Ub2)
240401 Write: Byte write to this address is latched into Ub1 for the 8031 MCU to read.
Read: Byte read from this address is the contents of latch Ub2, which contains data sent by the 8031.
240500 240501 Frequency control. Write-only.
240600 2406xx Unknown.
240700 240701 Digital output port: A/D channel select, etc.
240701 
 7654 3210 
 W..P AAFF

W: Watchdog Timer Clear. Toggle to reset (“pet”) the watchdog timer.
P: Hold Power. 1 to hold power on, even if Ignition is turned off. 0 to release power when ignition is next turned off.
AA: A/D converter channel select, 2 bits. 0=RSSI, 1=UHF P14, 2=5V (divide by 2.5), 3=12V B+ (divide by 5.556)
FF: LF frequency select. 1 for F1, 0 for F2.

240800 240801 Digital output port: EEPROM and PCB-mounted LEDs
240801 
 7654 3210 
 .RG. DSC.

R: Red LED (D9)
G: Green LED (D10)
D: Data to EEPROM (MOSI)
S: Chip Select
C: Serial Clock

Local oscillator

The local oscillator consists of a fixed 100kHz output and a variable output generated by a 12-bit count-down timer. The count-down timer is followed by a flip-flop to square the duty cycle.

The output frequency for a given timer value is: $$F_{out} = \frac{10 \mathrm{MHz}}{C}$$

A timer value of 0 or 1 will give a 10MHz output, with the output frequency becoming progressively lower as the timer value is increased.

The following 68K assembly code loads the frequency control words for F1 and F2. 

* D0 = first  frequency value, should be >= 2 and <= 0xFFF
* D1 = second frequency value, should be >= 2 and <= 0xFFF
*
DTRKLOINIT
*
* Set up address registers
*
        LEA     SHAD07, A0              A0 = shadow register address
        MOVEA.L #$240701, A1            A1 = ASIC REG07

* 
* Calculate F1+F2 top tuning byte
*
        MOVE.W  D0, D2                  Get F1 tuning word
        LSR.W   #8, D2                  Get rid of the least significant byte
        ANDI.B  #$0F, D2                Mask off top nibble

        MOVE.W  D1, D3                  Get F2 tuning word
        LSR.W   #8, D3                  Get rid of least significant byte
        ANDI.B  #$0F, D3                Mask off top nibble
        LSL.W   #4, D3                  Move bottom nibble to top
        OR      D2, D3                  OR into D3

*
* Load F1 tuning word low byte
*
        ANDI.B  #$FC, (A0)              Switch to F2
        ORI.B   #$43, (A0)
        MOVE.B  (A0), (A1)              Shadow -> ASIC Reg

        MOVE.B  D0, $240501             Send frequency to ASIC

*
* Load F1+F2 tuning word, high nibble
*
        MOVE.W  D3, $240500           Mystery write...
        *
        * Most  significant nibble: F2 top nibble
        * Least significant nibble: F1 top nibble
        *

*
* Load F2 tuning word low byte
*
        ANDI.B  #$FC, (A0)              Switch to F1
        ORI.B   #$42, (A0)
        MOVE.B  (A0), (A1)              Shadow -> ASIC Reg

        MOVE.B  D1, $240501             Send frequency to ASIC

*
* Switch to desired F1/F2 output
*
        ANDI.B  #$FC, (A0)              Switch back to F2
        ORI.B   #$43, (A0)
        MOVE.B  (A0), (A1)              Shadow -> ASIC Reg

*        ANDI.B  #$FC, (A0)              Switch back to F1
*        ORI.B   #$42, (A0)
*        MOVE.B  (A0), (A1)              Shadow -> ASIC Reg

        RTS

Dual UART I/O ports

TBD

Interrupts

Interrupt priority levels

The IPL0 and IPL2 bits are wired together, meaning any valid IPL level will have both bits set the same. The IPL1 bit is set independently.

IPL Bits Peripheral
0 000 (no interrupt)
1 001 not valid
2 010 UART
3 011 not valid
4 100 not valid
5 101 RF Phase measurement
6 110 not valid
7 111 NMI (non-maskable interrupt)

Interrupt vectors

Vector dec Vector hex Peripheral
64 0x40 UART
85 0x55
170 0xAA
255 0xFF

Vectors 0x55, 0xAA and 0xFF all reference the same interrupt handler (in the V7.1.1.4 firmware), which handles phase measurements.

Autovectoring is not used.

Watchdog timer

The Mk2 Locator has a hardware watchdog timer. The time-out is fixed at 2 seconds.

The watchdog is reset ('pet') by toggling the most significant bit of ASIC register 240701.

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  • Last modified: 2022/07/20 00:30
  • by philpem