Single board computer GAL logic equations file
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Name     sbc ;
PartNo   00 ;
Date     01/08/00 ;
Revision 01 ;
Designer Lee ;
Company  ;
Assembly None ;
Location  ;
Device   g16v8as ;

/* This GAL is the random glue for the sbc board	*/

/* Logic minimisations			None				*/
/* Optimizations			None				*/
/* Download				JEDEC/POF/PRG			*/
/* Doc File Options			fuse plot, equations		*/
/* Output				None				*/

/* *************** INPUT PINS *********************/

PIN	1 = A15		;			/* address bus		*/ 
PIN	2 = A14		;			/* address bus		*/ 
PIN	3 = A13		;			/* address bus		*/ 
PIN	4 = A12		;			/* address bus		*/ 
PIN	5 = A11		;			/* address bus		*/ 
PIN	6 = A10		;			/* address bus		*/ 
PIN	7 = A9		;			/* address bus		*/ 
PIN	8 = A8		;			/* address bus		*/ 
PIN	9 = RW		;			/* read write		*/ 
PIN	11 = p02	;			/* phase 2 clock	*/ 

/* *************** OUTPUT PINS *********************/

PIN  19 = ROM		;			/* 32K ROM		*/ 
PIN  18 = port0		;			/* port 0 strobe	*/ 
PIN  17 = port1		;			/* port 1 strobe	*/ 
PIN  16 = RAM0		;			/* lower 32K RAM	*/ 
PIN  15 = RAM1		;			/* upper 32K RAM	*/ 
/*PIN  14 = 		;			/*			*/ 
/*PIN  13 = 		;			/*			*/ 
/*PIN  12 = 		;			/*			*/ 

/* intermediate terms */

Mrom = A15 & A14 & A13 & A12 & A11 & RW ;		/* Monitor ROM adress range	*/
Brom = A15 & A14 & (!A12 # !A13) & RW ;			/* BASIC ROM C000 - EFFF	*/

/* Output terms */

!port0	= A15 & A14 & A13 & A12 & !A11 & !A10 & !A9 & !A8 ;	/* 256 byte block	*/
!port1	= A15 & A14 & A13 & A12 & !A11 & !A10 & !A9 & A8 ;	/* 256 byte block	*/
!RAM0	= !A15 & p02 ;						/* lower 32K RAM	*/ 
!RAM1	= !(Mrom # Brom # !port0 # !port1) & A15 & p02 ;	/* upper 32K RAM	*/ 
!ROM	= (Mrom # Brom) & p02 ;					/* 32K ROM		*/ 

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