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Packard 386 SBC board
This is the controller PCB from a Packard 500TR flow scintillation analyser. My board came from the unit in DextersTechLab's teardown video.
Part numbers on the PCB:
- 7101196
- 5091196-G
- 1310067 REV A (on PAL chip)
- 1310068 REV E (on BIOS chip)
Features:
- 80386SX processor, MHz
- 8x 30-pin SIMM slots (2x 512K modules fitted for a total of 1MB RAM)
- Chips & Technologies 82C836 “SCATsx” chipset
- Chips & Technologies 82C710 Super I/O
- 1x IDE channel
- 1x floppy drive port
- PS/2 mouse port
- Chips & Technologies 8042 keyboard controller
- Standard pinout
- Keyboard port, Keylock (keyboard inhibit), A20 line
- Chips & Technologies BIOS
Connectors and jumpers
J1 - Watchdog
3-pin 0.1in-pitch header
Pins from left to right, with the RAM slots held at the left.
1 | 2 | 3 |
---|---|---|
notch |
1 | |
---|---|
2 | MAX891 pin 11 (Watchdog In) |
3 | 0V |
J2 - PS/2 Mouse
5-pin 0.1in-pitch header
Pins from left to right, with the RAM slots held at the left.
1 | 2 | 3 | 4 | 5 |
---|---|---|---|---|
notch |
1 | Mouse Data (82C710 pin 61) |
---|---|
2 | |
3 | 0V |
4 | 5V via fuse |
5 | Mouse Clock (82C710 pin 60) |
J3 - Keyboard
10-pin IDC connector
Pins from left to right, with the RAM slots held at the left.
1 | 3 | 5 | 7 | 9 |
---|---|---|---|---|
2 | 4 | 6 | 8 | 10 |
notch |
1 | Keyboard Data |
---|---|
2 | Keyboard Clock |
3 | 0V |
4 | |
5 | 5V |
6 | |
7 | |
8 | |
9 | |
10 |
J4 - Front Panel?
Mounted flat to the PCB. 8-pin (4×2) 0.1in-pitch Dupont connector.
Pins from left to right, with the RAM slots held at the left.
PCB | |||
---|---|---|---|
1 | 3 | 5 | 7 |
2 | 4 | 6 | 8 |
1 | via 150R to +5V |
---|---|
2 | 0V |
3 | 0V |
4 | Keylock (8042 pin 34) |
5 | via 200R to +5V |
6 | |
7 | +5V via fuse |
8 | via 33R to |
Jumpers
- JMP1: (Unknown) - Connects to 8042 pin 33. Display Type jumper?
- JMP2: (Unknown) - normally set right. Sets centre pin to either 0V or 5V
- JMP3: Not fitted
- JMP4: 4-pin, unknown function
- JMP5: Not fitted
- JMP6: (Unknown) - normally set right.
- JMP7: CMOS Clear. Up (2-3) to clear CMOS. Down (1-2) for normal operation