Table of Contents

ACM communications protocol

Physical layer interface

The ACM has a 6502-style bus interface, with the following pins:

D0-D7 8-bit data bus
RS Register select, address bit zero
R/!W Read/not-write
!ACMSEL ACM Select, negative-going
!SIRQ ACM IRQ (to set-top processor)

There is also an EXT ACM DATA pin, which connects to the ACM phono port on the back of the receiver.

The ACM also receives composite sync from the STB, and produces RGB video and fast-blanking for the on-screen display output.

Receiver-specific implementation notes

Register interface

RS Read Write
0
1 Status?

Status register

Bit Function
7
6
5
4
3
2
1
0

Communications examples

When monitoring traffic using the Saleae, the high byte of the parallel analyser is used as follows:

00/0: RS=0 Write
01/1: RS=1 Write
10/2: RS=0 Read
11/3: RS=1 Read

Tatung, no ACM present

Reads return 0x00 as no ACM is present.

R/W RS Data Function
read 1 -
write 1 05
read 0 -
read 1 -
write 0 0C
read 1 -
write 1 3D
read 0 -
read 1 -
read 1 -

RS=1 reads repeat forever in bursts of 79 to 82 attempts, with a 42.8 to 57.6us gap between each burst. There is a delay of 5.2us between each attempt.